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説明
It’s time to take Autodesk® AutoCAD® Electrical to the next level. Designers and drafters have been using this powerful software for years, and the Holt Design Toolkit will help you maximize AutoCAD Electrical with 15 new tools designed for efficiency and productivity. Save your organization time and money by using the Holt Design Toolkit to:
- Create cleaner and better custom symbols in less time and with zero aggravation.
- Shorten QA/QC timelines by establishing relationships between components and drafting within those boundaries.
- Preview terminal strip annotation and quickly edit connected components, even on closed drawings.
- Automatically sequence every wire in your project based on custom master wire sequences.
- Show or hide selected attributes on some or all of your components across the entire project.
- So much more!
Users will see a quick return on the investment of the Holt Design Toolkit. Whether your project is large or small, these 15 tools will help reduce drafting errors, increase design efficiency, and get much closer to final on the first draft of your drawings. Finish your projects faster so that you can start new projects sooner with the Holt Design Toolkit.
このバージョンについて
バージョン 1.0, 2021/01/18This is the original version of the Holt Design Toolkit, and it contains the following commands:
IAN = Increment ATTDEF name suffix
IAV = Increment ATTDEF/ATTRIB/TEXT value
CHA_DIR = Change wire connection attdef direction code
CHECKWIRE = Check for wire number pointer; update X?TERMxx values; quick wire number edit
HDC_REORDER_ATTDEF = reorders ATTDEFS on opened symbol's DWG
AGAP = Specify gap between attributes
HDC_TERMMAP = Map terminal strips to primary components on panel front-view drawing
HDC_TERMASSIGN = Edit terminal assignments based on terminal strip mapping
HDC_ANNOPREVIEW = Preview annotation of selected term strip
BLANKFAM = Blank selected attribute values for selected family types
HDC_HIDEATTRS = Hide selected attributes for selected family types
HDC_SETWIRESEQ = Set master wire sequence on panel front view drawing
HDC_DOWIRESEQ = Automatically reset wire sequences based on master wire sequence
MARK_DWG_REFONLY = Toggle multiple dwgs in Project Manager "Ref-only"
BLOCKS_INUSE = List where blocks are used, folder/sub-folder wide
公開元プライバシー ポリシー